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The ATP DDR4 is a high-speed dynamic random-access memory which internally configured as an 8-bank DRAM and the device uses an 8n-prefetch architecture to achieve high-speed operation. The 8n-prefetch architecture is combined with an interface designed to transfer two data words per clock cycle at the I/O pins.
ATP DDR4 module is the evolutionary transition from DDR3, supporting features and functions that offer lower power, higher performance, and better manufacturability over earlier DRAM products. The features supported by DDR4 are well suited for customers who are under pressure to increase the bandwidth capabilities of their equipment to support the growth of online traffic.
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